The present disclosure relates to a gate driving circuit for driving a switch, and a switching apparatus and a power supply apparatus having the same.
Generally, electronic apparatuses performing various functions depending on user selection include a semiconductor switch in order to perform a function change, a switching operation, or the like, and mainly use a gate driving circuit in order to drive the semiconductor switch.
Among such electronic apparatuses, a power supply apparatus mainly uses a switching mode power supply (SMPS) scheme in switching power and uses a power switch in order to switch the power. Therefore, agate driving circuit for driving the power switch may be necessarily used in the power supply apparatus.
Meanwhile, the gate driving circuit described above provides a high level signal and a low level signal for turning the switch on or off. To this end, as disclosed in the following Related Art Document (Patent Document 1), at least two switches may be connected to each other in series to output a gate signal.
However, in the gate driving circuit according to the related art described above, in order to stably provide the high level signal and the low level signal for turning the switch on or off, dead time controlling is performed so that the at least two switches are alternately switched on and off and an output buffer is used, causing power consumption.